We are looking for an experienced EMIR (Electro-Migration & IR Drop) Engineer to be part of our VLSI Physical Design Sign-off team. The ideal candidate should have hands-on expertise in EM/IR analysis, Power Integrity, and Reliability verification, with strong problem-solving skills to ensure robust silicon sign-off.
- Perform EM/IR analysis (static & dynamic) at block and full-chip levels.
- Run short path resistance and Reff checks for reliable power grid analysis.
- Work closely with CAD and Implementation teams to build and validate a robust power delivery network.
- Perform analysis and debug with package RLC models for accurate power integrity closure.
- Analyze IR drop across different PG meshes, corners (PVTs), and operating modes.
- Debug violations, provide fixes, and guide design teams in optimizing PDN and power integrity.
- Automate EMIR analysis workflows using scripting (Tcl, Python, Perl, or Shell).
- Generate sign-off reports and support tape-out deliverables.